Browse Prior Art Database

System Clocking And Control Function

IP.com Disclosure Number: IPCOM000100812D
Original Publication Date: 1990-Jun-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 2 page(s) / 68K

Publishing Venue

IBM

Related People

Hausman-Davis, KA: AUTHOR [+3]

Abstract

This article describes a circuit arrangement for timing generation using an on-chip phase-locked loop (PLL) that generates a high frequency clock from a lower frequency oscillator off-chip.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 69% of the total text.

System Clocking And Control Function

       This article describes a circuit arrangement for timing
generation using an on-chip phase-locked loop (PLL) that generates a
high frequency clock from a lower frequency oscillator off-chip.

      The integrated circuit disclosed herein is shown in block
diagram in the drawing.  It performs several functions, as set forth
below.
1.   It generates a high frequency clock from a low frequency
oscillator.  There are two outputs associated with every clock.  By
delaying one clock, the two clock outputs run 90 degrees out of phase
with each other. The output frequency is selectable.  To allow this,
the circuitry contains a variable-depth ring oscillator connected so
that it functions as a voltage-controlled oscillator (VCO).  Clock
nets are point to point, which offers a very significant advantage
over a daisy-chained clocking network by minimizing clock signal
skew.  The present configuration has four outputs, but there can be
more.  The only limitation on clock outputs is the number of output
pins available in the package being used. In order to control the
system from a bring-up tool, there is an interface provided for this
tool.  This give the ability to selectively enable and disable output
clocks, as well as the capability to override output clocks.
2.   It controls the Reset function for the system.  The hardware
reset signal, SYSTEM RESET, sourced by the clock generation chip, is
used by the clock generator...