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Calculating VLSI Wiring Capacitance

IP.com Disclosure Number: IPCOM000100910D
Original Publication Date: 1990-Jun-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 4 page(s) / 142K

Publishing Venue

IBM

Related People

Adams, E: AUTHOR [+2]

Abstract

Disclosed is a procedure for obtaining approximate values for the capacitances of wires in a VLSI layout. The capacitance values obtained by this procedure are sufficiently accurate for use in circuit simulation and timing analysis, and can be computed quickly and easily.

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Calculating VLSI Wiring Capacitance

       Disclosed is a procedure for obtaining approximate values
for the capacitances of wires in a VLSI layout.  The capacitance
values obtained by this procedure are sufficiently accurate for use
in circuit simulation and timing analysis, and can be computed
quickly and easily.

      Introduction Accurate simulation of the electrical behavior of
integrated circuits (ICs) is an important and established step in
their design.  Due to their continuing and dramatic reduction in the
size of ICs, the capacitances of the interconnection wires are
becoming a more important factor in determining the speed of advanced
VLSI circuitry.  At the same time, VLSI wiring capacitances are
becoming ever more burdensome to calculate.  Direct calculation of
the capacitances of all but the simplest configurations of wires
require extraordinary amounts of computation time, in part because
the presence of each conductor has an effect on the distribution of
charge on every other conductor.  In practice, it is impossible to
perform direct capacitance computations for realistic VLSI wiring
geometries.

      A procedure is described that simplifies and speeds the
computation of the capacitances associated with VLSI wiring, while
maintaining the degree of accuracy needed for circuit simulation.
The basic methodology consists of identifying which coefficients of
capacitance are to be retained and which are to be discarded, and of
a procedure by which the retained capacitances are constructed two
conductors at a time.  Thus, the general n-body capacitance problem
is reduced (approximately) to a series of one- and two-body
capacitance problems.

      Classification of Capacitative Interactions Although, in
principle, every pair of wires has a non-zero coupling capacitance,
in practice the overwhelming majority of coupling capacitances will
be very small and can (and should) be neglected.  One basic
ingredient in the procedure described here is a classification scheme
by which capacitative interactions are designated to be either
important (to be retained) or unimportant (to be discarded). The
classification scheme is developed with respect to pairs of
straight-line wire segments that either run in parallel or at right
angles to each other.

      All capacitative interactions between pairs of straight-line
wire segments are designated to be unimportant, with the following
exceptions:
1.)  Two straight-line wire segments that overlap (or cross over)
each other.
2.)  Two straight-line wire segments that run directly parallel to
each other, and do not have an intervening wire segment that
"shields" or "screens" them from each other.  (Directly parallel
means that each point on one segment is connected to a point on the
other segment by a perpendicular).

      Characterization of Capacitative Interactions

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 A second basic
ingredien...