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Fault Tolerant Mechanism for Fairness On Segments of Full-Duplex Ring

IP.com Disclosure Number: IPCOM000100943D
Original Publication Date: 1990-Jun-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 6 page(s) / 159K

Publishing Venue

IBM

Related People

Cidon, I: AUTHOR [+2]

Abstract

This article describes a fault-tolerant mechanism for the fairness algorithm over a full-duplex buffer insertion ring. This mechanism can tolerate any number of link or node failures, such that the fair access will continue to operate correctly on every connected segment (or arc) of the ring, i.e., the ring can be broken in multiple points and still have fair access control.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 44% of the total text.

Fault Tolerant Mechanism for Fairness On Segments of Full-Duplex Ring

       This article describes a fault-tolerant mechanism for the
fairness algorithm over a full-duplex buffer insertion ring. This
mechanism can tolerate any number of link or node failures, such that
the fair access will continue to operate correctly on every connected
segment (or arc) of the ring, i.e., the ring can be broken in
multiple points and still have fair access control.

      The hardware control messages are used for the exchange of
state information between neighboring nodes.  These messages can be
used for source fairness, back pressure and overflow prevention, and
have the following characteristics:
o    Very short - few characters (possibly one).
o    Preemptive priority - can be sent in the middle of a data
packet.
o    Non-distructive - does not damage the data packets which they
preempt.
o    Delay - virtually only the link propagation delay (no queueing
delay).
o    Independent hardware - used for the ring control mechanism.

      The access on each direction of the ring is regulated by a
control message, SAT, which circulates in the opposite direction to
the data traffic it is regulating.  The access is completely fair
(all nodes have equal opportunity), while maintaining most of the
potential spatial reuse in the full-duplex buffer insertion ring.
Fig. 1 describes the basic SAT mechanism for one direction of the
ring.  In this case the data is transferred down-stream, and the SAT
message is transferred up-stream.

      In principle, the node will forward the SAT message up-stream
with no delay, unless it is "starved."  By "starved," we mean that
the node could not send the permitted number of messages since the
last time it has forwarded the SAT message.

      Fault-Tolerant Fairness The fault-tolerant mechanism has two
parts (i) on-line fault detection and (ii) distributed recovery
mechanism by gracefully degrading the operation to full-duplex
segments of the ring.

      On-line Fault Detection and Isolation It is assumed that the
full-duplex links are point-to-point and active all the time.  During
link initialization, recovery and between data transmissions, a
synchronization signal is transmitted.  This signal is used for bit
synchronization, i.e., extracting the transmitting clock from the
incoming serial bit stream.  Usually (especially if some line coding
is used), this signal is distinct from any other bit pattern that can
be received during the transmission of data.

      For the purpose of this design the synchronization signal will
include information on the state of the receiver side of the link,
which can be up (operational) or down. That is, the state of each
side of the full-duplex link is returned as feedback to the other
side.  As a result, it is possible to indicate and then isolate
faulty links and nodes.  The objective of this mechanism is to
minimize data transmission ove...