Browse Prior Art Database

State Save/Restore Using Lssd Scan Chains

IP.com Disclosure Number: IPCOM000100981D
Original Publication Date: 1990-Jun-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Johnson, L: AUTHOR [+4]

Abstract

This disclosure describes a means of saving the current task of a processor and of loading a new task, using the LSSD scan chains.

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State Save/Restore Using Lssd Scan Chains

       This disclosure describes a means of saving the current
task of a processor and of loading a new task, using the LSSD scan
chains.

      TASK SAVE OPERATION When a Task Save operation is required, the
Processor Control Circuitry connects all the scan chains in the
processor core together into one loop by switching multiplexers 100
through 103 (see the figure) using SSR_MODE as the multiplexer
control.  It then activates a signal (SSR_SCAN_GATE) to the clock
generator for N cycles, N being the number of bits in the externally
readable register labeled 200.  When the clock generator receives SSR
SCAN GATE, the current task of the processor stops, and the scan
chains begin scanning (circulating) data around the scan loop. After
N cycles, register 200 has N bits of the processor core's state. The
data is then read out of the processor core. This sequence continues
until all states in the processor core are read.

      TASK RESTORE OPERATION When a Task Restore operation is
required, the Processor Control Circuitry connects all the scan
chains in the processor core together into one loop by switching
multiplexers 100 through 103 (see figure).  It also switches from
functional mode to scan mode causing all operations in the processor
core to cease. After external data is written to external data
register 200, SSR_SCAN_GATE becomes active for N cycles, which shifts
N bits of restore data into the first N SRLs in th...