Browse Prior Art Database

Memory-Array Word-Line Failure Detection

IP.com Disclosure Number: IPCOM000101048D
Original Publication Date: 1990-Jun-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 3 page(s) / 104K

Publishing Venue

IBM

Related People

Barrett, WM: AUTHOR [+2]

Abstract

Arrays of random-access memory (RAM) are commonly used within VLSI devices to efficiently use the area on the chip in storing information. Because of the inherent structure of arrays there are specific ways for the array to fail that are more common than others. A predominant failure type is for a word-line to fail. When this happens, an access to a specific word will result in receiving the data from a different word within the array. This is termed an "addressing error". For arrays with latched outputs, the data presented will likely be the data obtained on the previous read operation ("previous-data error"). This kind of error is particularly dangerous because the wrong data will have good parity and thereby this failure will go undetected, affecting the data integrity of the machine.

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Memory-Array Word-Line Failure Detection

       Arrays of random-access memory (RAM) are commonly used
within VLSI devices to efficiently use the area on the chip in
storing information.  Because of the inherent structure of arrays
there are specific ways for the array to fail that are more common
than others.  A predominant failure type is for a word-line to fail.
When this happens, an access to a specific word will result in
receiving the data from a different word within the array.  This is
termed an "addressing error".  For arrays with latched outputs, the
data presented will likely be the data obtained on the previous read
operation ("previous-data error").  This kind of error is
particularly dangerous because the wrong data will have good parity
and thereby this failure will go undetected, affecting the data
integrity of the machine.

      Described is a method which alters the parity stored within an
array based on the address of the location in order to detect errors
caused by word-line failures.  This scheme is simple and easy to
implement, and detects "addressing errors" 100 percent of the time.

      Parity is the most common method used for data stored in arrays
to detect an array failure and to preserve data integrity. Odd parity
on groupings of data (such as a byte) is typically used.  In order to
catch all "addressing errors", the parity for one location must
somehow be different than the parity for every other location.

      To accomplish this, the data in each location must have as many
groupings as there are address bits of the array. Each grouping is
associated with a specific address bit. For example, Address bit 0 is
used to generate parity for Data Group 0 as the...