Browse Prior Art Database

Current Sense Amplifier for Multi-Valued Read-Only Memory

IP.com Disclosure Number: IPCOM000101091D
Original Publication Date: 1990-Jun-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 3 page(s) / 96K

Publishing Venue

IBM

Related People

Sunaga, T: AUTHOR

Abstract

A differential current sense amplifier for a multi-valued read-only memory (ROM) is disclosed. The sense amplifier compares a reference current and a drain current of a conventional cell transistor. It then amplifies the current difference and converts it to full CMOS true/complement voltage signals.

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Current Sense Amplifier for Multi-Valued Read-Only Memory

       A differential current sense amplifier for a multi-valued
read-only memory (ROM) is disclosed.  The sense amplifier compares a
reference current and a drain current of a conventional cell
transistor.  It then amplifies the current difference and converts it
to full CMOS true/complement voltage signals.

      In a two-valued ROM, memory cells are usually personalized by
thin gate oxide or thick oxide.  Sense amplifiers usually detect
whether a voltage droop on a bit line exists.  In an N-valued ROM,
where N is greater than 2, typically 4, 8, or 16, threshold voltage
ion implantation possesses with N different dose amounts personalize
cells. Cells therefore have N different drain currents with the same
bias condition.  Bit line voltages also show N different discharge
waveforms.  It is easy for the sense amplifier to detect the voltages
when the bit line droops vary in a wide voltage range GND - VDD.
However, the cell configuration cannot allow droops lower than
VDD-Vt, where Vt is a threshold voltage of cell transistor.  It is
due to node sharing of cell transistors.  Two transistors share word
and column lines as shown in Fig. 1.  We assume C2 and W1 are
selected column and word lines.  C2 becomes ground and W1 goes to
VDD.  T3 and T4 are cells to be read through voltage levels on bit
lines, B2 and B3, respectively.  If the voltage on B2 droops below
VDD-(Vt of T2), T2 turns on in the source follower mode and supplies
a current from C1 to B2, where C1 is tied to VDD.  This sneak current
causes erroneous read of stored data in the T3 cell.  It is very
difficult to detect the conventional unloaded bit line voltage droop
in the multi-valued ROM.

      The disclosure aims to alleviate the difficulty in detecting
stored information in the multi-valued ROM.  Fig. 2 shows the circuit
configuration of th...