Browse Prior Art Database

Algorithm to Determine Logic Block Input And Output Weights For Test Generation

IP.com Disclosure Number: IPCOM000101111D
Original Publication Date: 1990-Jun-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 6 page(s) / 160K

Publishing Venue

IBM

Related People

Shearon, PC: AUTHOR

Abstract

This algorithm to determine logic block input and output weights for test generation, implemented in ETG (Enhanced Test Generation), increased test coverage and reduced running time. The advantage of this approach over prior art is that it determines better block input and output weights as measured by increased test coverage and reduced running time.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Algorithm to Determine Logic Block Input And Output Weights For Test Generation

       This algorithm to determine logic block input and output
weights for test generation, implemented in ETG (Enhanced Test
Generation), increased test coverage and reduced running time.  The
advantage of this approach over prior art is that it determines
better block input and output weights as measured by increased test
coverage and reduced running time.

      The following are new features contained in the algorithm:
   1.  Time is derived from weights to schedule the blocks for
implication so that the weights can be determined in BUILD THE
WEIGHTS.
      2.  Block implication is used to determine output weights in
BUILD THE WEIGHTS.
      3.  Good and fault machine logic values are used to determine
weights in BUILD WEIGHT LIST AND CALCULATE BLOCK INPUT WEIGHTS.
      4.  Block input weights (transmission weights) and minimum
block fanout weights are used to determine the difficulty of
propagation of a logic value to some observable point in CALCULATE
BLOCK FANOUT WEIGHTS.
The block list contains entries in a linked list as shown in Fig. 1.
The weight list contains an entry for each block in the logic
circuit, as shown in Fig. 2, where:
      CFWTASS is the come from weight assignment:
      0 = the topological order determines the come from weights.
 1 = the output weight for the logic value zero (WTO) of the come
from block determines the come from weights.
 2 = the output weight for the logic value one (WT1) of the come from
block determines the come from weights.
      OUTWTASS is the output weight assignment:
      0 = unused (CFWTASS must also be 0).
      1 = the output weight for logic vaue zero (WTO) of the block is
one more than the lowest come from weight...