Browse Prior Art Database

Reusable Zero-Insertion-Force Actuator

IP.com Disclosure Number: IPCOM000101117D
Original Publication Date: 1990-Jun-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 3 page(s) / 104K

Publishing Venue

IBM

Related People

Asselta, J: AUTHOR [+3]

Abstract

Disclosed is a device to actuate a chip carrier to a power/signal structure via a zero-insertion-force connector. The machine packaging density is increased because the device is detached from the chip carrier after completing the actuation and does not remain in the machine. The chip side of the chip carrier and the edges of the chip carrier are accessible to an alternate cooling technique and edge connectors. This one device is used again to actuate any number of chip carriers of the same size.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 76% of the total text.

Reusable Zero-Insertion-Force Actuator

       Disclosed is a device to actuate a chip carrier to a
power/signal structure via a zero-insertion-force connector. The
machine packaging density is increased because the device is detached
from the chip carrier after completing the actuation and does not
remain in the machine.  The chip side of the chip carrier and the
edges of the chip carrier are accessible to an alternate cooling
technique and edge connectors.  This one device is used again to
actuate any number of chip carriers of the same size.

      A zero-insertion-force actuator used to actuate a pin and
C-spring connector system is illustrated in Fig. 1.  The power/signal
structure 1 and the array carrier 2 are positioned on the base 3
between four rough-locating pins 4. The cavity matrix of the array
carrier is aligned with respect to the fine-locating holes 5 of the
array carrier frame 6.  The array carrier is then clamped within this
frame.  The array carrier frame is positioned on the base by locating
pins 7 and clamped to the base using the strap clamps 8.

      Fig. 2 shows the pin matrix of the chip carrier 9 aligned with
respect to fine-locating pins 10 of the chip carrier frame 11.  The
chip carrier is clamped along its edges in compression 12. The fine-
locating pins of the chip carrier frame are inserted into the fine-
locating holes 5 of the array carrier frame 6 guiding the pin matrix
of the chip carrier into the cavity matrix of the arr...