Browse Prior Art Database

Run-Time Software Architecture for a Workstation-Based Hardware Simulator

IP.com Disclosure Number: IPCOM000101183D
Original Publication Date: 1990-Jul-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 1 page(s) / 30K

Publishing Venue

IBM

Related People

Poursepanj, A: AUTHOR

Abstract

Disclosed is a brief description of run-time software architecture for a workstation-based hardware simulator.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

Run-Time Software Architecture for a Workstation-Based Hardware Simulator

       Disclosed is a brief description of run-time software
architecture for a workstation-based hardware simulator.

      A workstation-based hardware accelerator consists of one or
more cards that are plugged into the workstation system and work as a
simulation engine under the host control.

      The scenario of the simulation is defined and controlled by a
simulation control file.  Necessary functions have been added to
allow the user to write this file in REXX or C.  This provides a
flexible simulation control environment.

      REXX functions are designed such that they call C level
programs.  C programs talk to the hardware directly through another
C-written interface.  Model files are accessed through the C
functions.  The simulator hardware can directly talk to the array
processor that resides on the host.  All the arrays are modeled in
the host memory.  See the diagram for more information.