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Nanometer-Scale Wafer Alignment for Lithography Using Tunneling

IP.com Disclosure Number: IPCOM000101245D
Original Publication Date: 1990-Jul-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 2 page(s) / 107K

Publishing Venue

IBM

Related People

Arnett, PC: AUTHOR [+3]

Abstract

In modern VLSI technology, the alignment of the mask to the wafer is the limiting factor in setting the narrowest line width for the devices. Alignment is done by initially fabricating alignment marks on the wafer, and subsequently aligning the mask to those marks on each lithography step. The alignment is performed optically and estimated to be approximately 0.5 micron laterally (x,y) and 1 micron vertically (z). Described here is a technique which uses the current optical alignment system for the coarse alignment, and the fine alignment is done by monitoring and servoing the tunneling or field-emission (hereafter, tunneling) current between a slightly modified mask and standard wafer.

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Nanometer-Scale Wafer Alignment for Lithography Using Tunneling

       In modern VLSI technology, the alignment of the mask to
the wafer is the limiting factor in setting the narrowest line width
for the devices.  Alignment is done by initially fabricating
alignment marks on the wafer, and subsequently aligning the mask to
those marks on each lithography step. The alignment is performed
optically and estimated to be approximately 0.5 micron laterally
(x,y) and 1 micron vertically (z).  Described here is a technique
which uses the current optical alignment system for the coarse
alignment, and the fine alignment is done by monitoring and servoing
the tunneling or field-emission (hereafter, tunneling) current
between a slightly modified mask and standard wafer.

      Cantilevers and tips are added to the mask near the optical
alignment marks normally used for alignment.  The cantilevers can be
micromachined by selective etching or fabricated using thin film
technology.  The tips can be sputtered onto the cantilevers through
an aperture, leaving the cone shape that is indicated (they must be
electrically conductive).  In addition, electrical connections must
be made from the levers/tips to a connector on the mask; a ground, a
lever deflection voltage line, and a current sensing line for the tip
must be made for each lever/tip assembly.  The levers can be actuated
up and down electrostatically by applying a voltage between the lever
and mask substrate (z-drive).

      The mask is positioned with the normal mechanics plus an
additional set of fine motion devices, for example, piezoelectric
elements.  Three elements are required:  one for x, y, and r
(x-drive, y-drive and r-drive).  The x- and y-drives locate the x and
y position of the mask relative to the wafer, and the r-drive locates
the rotation of the mask relative to the wafer, pivoting about the
location of the x- and y- tips.

      The alignment procedure is as follows:
 1.   The mask and wafer are aligned optically in the usual fashion,
with the z-drive of each of the three levers retracted.
 2.   Each z-drive servos toward the wafer independently.  When a
tunneling current is established between the individual tips and
wafer, the z-drives will servo on that current and hold a constant
spacing between the tips and wafer.
 3.   The x-drive is activated until the x-tip reaches the raised
metallization, at which time the z-drive for the x-tip will have to
pull back since it is servoing and trying to keep the current
constant.  The x-drive then servos on the z-drive for that particular
tip, and will hold the tip at or near the metallization edge (more on
this later).
  4.   The y-drive is activat...