Browse Prior Art Database

Dynamic Selection of DMA Or PIO for Best Performance

IP.com Disclosure Number: IPCOM000101262D
Original Publication Date: 1990-Jul-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 2 page(s) / 75K

Publishing Venue

IBM

Related People

Edrington, JD: AUTHOR [+6]

Abstract

This article describes a device and programming method which permit either Direct Memory Access (DMA) or Programmed Input Output (PIO) to be dynamically selected. This allows the most efficient type of transfer to be utilized, as conditions change.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Dynamic Selection of DMA Or PIO for Best Performance

       This article describes a device and programming method
which permit either Direct Memory Access (DMA) or Programmed Input
Output (PIO) to be dynamically selected.  This allows the most
efficient type of transfer to be utilized, as conditions change.

      CONVENTIONAL METHODS: The output to a memory-mapped peripheral
under program control is done by writing directly to an address or
group of addresses decoded by that peripheral.  This method is very
fast for 1-10 word writes, or where the peripheral will accept
multiple words quickly.  If, however, the peripheral must be tested
for busy prior to each write, or the peripheral holds up writes via a
"busy" hardware line, this method will be slowed and delay further
computer processing.

      An alternative method of output to a peripheral, DMA, solves
the problem described above for relatively large blocks of data.
Data is written by the computer program into a random access memory
(RAM) buffer.  The computer's DMA controller is programmed to output
this buffer to the peripheral.  Thus the DMA controller hardware
monitors the peripheral for busy, freeing the computer to continue
processing.  The disadvantage of the DMA method is the overhead of
setting up and managing the DMA controller. This overhead must be
spread over many peripheral writes to be justified.

      DEVICE: A part of this technique is special peripheral address
decoding circuitry, with two ways to place data into a peripheral
register.  In this example, it is desired to output 19 words of data
to a graphics peripheral, which uses this information to render a
Gouraud shaded triangle onto a CRT display.  This peripheral is
designed to accept data as 19 individual words into 19 unique
addresses.  It can also accept these 19 words into a single address,
if each word...