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Browse Prior Art Database

One-Bit Token Ring Arbitration Protocol/Scheme

IP.com Disclosure Number: IPCOM000101270D
Original Publication Date: 1990-Jul-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 7 page(s) / 198K

Publishing Venue

IBM

Related People

Guthrie, GL: AUTHOR [+2]

Abstract

This arbitration scheme is intended to be used in chip designs which require some kind of arbitration to gain control of a bus or group of signals shared by other chips or users.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 37% of the total text.

One-Bit Token Ring Arbitration Protocol/Scheme

       This arbitration scheme is intended to be used in chip
designs which require some kind of arbitration to gain control of a
bus or group of signals shared by other chips or users.  The one-bit
token ring arbitration protocol/scheme requires the definition of:
      1)   Three Chip I/O Signals        6)   Implementation
           a)  Arbitration In                 a)  I/O Signals
                                                  Interface
           b)  Arbitration Out                b)  Timers
           c)  Bus Error                      c)  Ring State
                                                  Machine
      2)   I/O Signal Connections        7)   Advantages
      3)   Two Internal Chip Timers
           a)  Token Hold Timer
           b)  Token Rotation Timer
      4)   Error Conditions
      5)   Protocol
           a)  Ring Startup
           b)  Arbitration
           c)  Error Handling

      1)   I/O Signal Definitions: Positive logic is used to define
the active levels of the I/O signals. a)   Arbitration In -    This
signal is an input to the chip being (AI) designed.  The purpose of
this signal is to receive the token when passed from another user on
the ring.  A token appears as a one-cycle active low pulse.
b)   Arbitration Out -   This signal is an output from the chip being
(AO)               designed.  The driver is an open collector with a
pull-up resistor external to the chip.  The purpose of this signal is
to send the token to the next ring user.  A token appears as a one-
cycle active low pulse.
c)   Bus Error -         This signal is bidirectional and the driver
is (-E)           an open collector with a pull-up resistor external
to the chip.  The purpose of this signal is to indicate an error
condition which has occurred on the shared bus, during arbitration or
internal to the designed chip.  An error appears as an active low
signal.

      2)   I/O Signal Connections: Fig. 1 illustrates two connection
configurations of the three I/O signals with other chip designs to
form the one-bit token ring.

      3)   Internal Chip Timers Definition: Each designed chip may
contain two timers.  These two timers allow for programmable bus
arbitration latencies. The rate and implementation of these timers
may be determined by the designer, system environment, and/or chip
clock rate.
      a) Token Hold Timer -    This timer defines the maximum time
the (THT)          designed chip may hold onto the arbitration token.
      b) Token Rotation Timer -     This timer defines the maximum
tim...