Browse Prior Art Database

Technique for Reducing the Number of Registers Saved at a Context Swap

IP.com Disclosure Number: IPCOM000101409D
Original Publication Date: 1990-Aug-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 2 page(s) / 85K

Publishing Venue

IBM

Related People

Stone, HS: AUTHOR

Abstract

A scheme has been described (*) that determines if all or no registers of a processor have to be saved at a context switch. The advantage of having the flexibility of saving all or no registers is that context switches can be very fast when no registers need to be saved, and the penalty of saving and restoring registers is felt only when information in one or more registers has to be saved. The scheme described here uses one bit per register to determine when the contents do not need saving when a context swap occurs.

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Technique for Reducing the Number of Registers Saved at a Context Swap

       A scheme has been described (*) that determines if all or
no registers of a processor have to be saved at a context switch.
The advantage of having the flexibility of saving all or no registers
is that context switches can be very fast when no registers need to
be saved, and the penalty of saving and restoring registers is felt
only when information in one or more registers has to be saved.  The
scheme described here uses one bit per register to determine when the
contents do not need saving when a context swap occurs.

      The prior-art scheme (*) relies on a simple test to determine
when a specific state has been reached in which the contents of the
current registers do not have to be restored, or when the new
contents of those registers after a context swap do not have to be
initialized before starting a program.

      There are more general conditions that apply to the saving and
restoring of individual registers.  We describe those conditions and
indicate how they can be exploited to reduce the cost of state
saving.

      The Register-Saving Scheme
Consider the assembly language program below:
      1. LOAD X to R1
      2. LOAD Y to R2
      3. ADD R1 and R2 to R2
      4. LOAD Z to R1
      5. MUL R1 by R2 to R2
      6. STORE R2 to W

      After instruction 3, the contents of R1 are no longer used
because instruction 4 loads a new value into R1. Similarly, both R1
and R2 are potentially dead after instructions 5 and 6, respectively,
if no additional references to these particular registers occur again
before the registers are written.

      If a context swap occurs at a time when a register is dead,
that register need not be saved at the context swap, and need not be
restored when the process is restarted later. The overhead of
register saving is small but nonnegligible for machines with 16 to 32
general- purpose registers, which is typical for processors designed
prior to 1980.  New designs, however, have over 100 registers, and
floating- point coprocessors when used in conjunction with such
processors can double the number of re...