Browse Prior Art Database

Protection Mechanism for Dynamic Bankswitched Memory in a System Without A Protect Mode Microprocessor

IP.com Disclosure Number: IPCOM000101421D
Original Publication Date: 1990-Aug-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 2 page(s) / 66K

Publishing Venue

IBM

Related People

Bilder, MM: AUTHOR [+4]

Abstract

This article describes a technique which allows for blocks of memory to be both write protected and read/write protected in a multitasking environment that is controlled by an Intel 80186 microprocessor which is not a protect mode microprocessor.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 63% of the total text.

Protection Mechanism for Dynamic Bankswitched Memory in a System Without A Protect Mode Microprocessor

       This article describes a technique which allows for
blocks of memory to be both write protected and read/write protected
in a multitasking environment that is controlled by an Intel 80186
microprocessor which is not a protect mode microprocessor.

      The technique disclosed herein solves the problem that exists
when a multitasking supervisor is running on an 80186 processor which
has no built-in protection hardware.  The 80186 processor has a
20-bit address bus thereby allowing up to 1 Mbyte of memory to be
addressed.  The implementation of this disclosure uses a dynamic
address translation table (DATT) to allow the 80186 to map up to 2
Mbytes of physical memory into its 1 Mbyte address range, in a
16-Kbyte granularity.  Entries in the DATT RAM shown in Fig. 1 are
accessed dynamically (and transparently) by the 80186 as it executes
its program.

      This is a fairly common implementation of a dynamic
bankswitched memory scheme except for the addition of the WRITE
PROTECT BIT and the READ/WRITE PROTECT BIT.  These two additional
bits allow each of the 64 entries in the table (or equivalently, each
16-Kbyte block of memory) to be either write protected or read/write
protected.  Another feature of the implementation allows for a single
programmable bit, the ENABLE DATT bit (Fig. 2) to be a privileged I/O
bit of the control program.  This bit all...