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Browse Prior Art Database

Local Test of Arbitration And Interrupts Using a Microprocessor

IP.com Disclosure Number: IPCOM000101480D
Original Publication Date: 1990-Aug-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 3 page(s) / 91K

Publishing Venue

IBM

Related People

Dang, TH: AUTHOR [+3]

Abstract

Frequently, in complex microprocessor systems, it becomes necessary to isolate components of the system for testing and diagnostics. This disclosure details a method to isolate requesting, arbitrating and interrupting components of the system for enhanced test and diagnostic capability. The local microprocessor provides these functions through the use of two test bits which enable the system arbiter and system interrupt controller to be locked into or out of the test mode.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Local Test of Arbitration And Interrupts Using a Microprocessor

       Frequently, in complex microprocessor systems, it becomes
necessary to isolate components of the system for testing and
diagnostics.  This disclosure details a method to isolate requesting,
arbitrating and interrupting components of the system for enhanced
test and diagnostic capability. The local microprocessor provides
these functions through the use of two test bits which enable the
system arbiter and system interrupt controller to be locked into or
out of the test mode.

      Figure 1 depicts a block diagram of the arbiter.  The arbiter
consists of a request register, an arbitration control logic, a mask
register, a priority register and two in-service registers.  The
arbitration in this particular system is overlapped in that the
devices utilizing the bus have requested the bus in the prior cycle.
Therefore, two in-service registers are used to maintain tracking of
the current (first) and previous (second) devices which have received
grants. In-service register #2 maintains an identification as to
which device previously obtained the grant, and in-service register
#1 identifies which device currently (or was the last) to be granted
the bus.

      The arbiter is placed in the test mode by the microprocessor
writing test bit #1.  Once in the test mode, the microprocessor may
access the arbitration facilities in a local mode only.  A typical
sequence for the microprocessor would be:
           1) Set test bit #1 on.
           2) The priority register is set to 'FF' which
              disables arbitration.
           3) A test value is placed in the request register.
           4) The test value is loaded into the mask
              register.
           5) The priority register is set with a test value.
           6) In-service registers #1...