Browse Prior Art Database

Use of Counter to Synchronize Multiprocessors

IP.com Disclosure Number: IPCOM000101508D
Original Publication Date: 1990-Aug-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 2 page(s) / 54K

Publishing Venue

IBM

Related People

Grohoski, GF: AUTHOR [+4]

Abstract

This embodiment of a multiprocessor system has two processors, A and B. These processors are dispatched instructions for execution from a dispatch unit D. The A processor executes different instructions than the B processor, and the B unit executes different instructions from A. However, some instructions require execution in both units, thus requiring synchronization between A and B. The D unit dispatches instructions for both A and B units to both units (i.e., A unit gets both A unit instructions and B unit instructions). Both A and B units may execute instructions which require more than one cycle to execute.

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Use of Counter to Synchronize Multiprocessors

       This embodiment of a multiprocessor system has two
processors, A and B.  These processors are dispatched instructions
for execution from a dispatch unit D.  The A processor executes
different instructions than the B processor, and the B unit executes
different instructions from A.  However, some instructions require
execution in both units, thus requiring synchronization between A and
B.  The D unit dispatches instructions for both A and B units to both
units (i.e., A unit gets both A unit instructions and B unit
instructions).  Both A and B units may execute instructions which
require more than one cycle to execute.

      A and B units must synchronize on instructions which require
both processors.  However, the A unit or the B unit may get ahead of
the other unit when executing non-synchronized instructions.  A
mechanism is needed so that a processor "knows" when it is ahead of
the other processor.  When a processor is ahead and tries to execute
a synchronizing instruction, it must wait until both units are in
"sync" again.

      An up/down counter may be used to determine when a processor is
ahead or behind another processor.  The A processor must inform the B
processor when it executes or discards instruction(s).  An
instruction(s) is discarded when a processor does not execute it.  In
this example, the A processor would discard all instructions intended
for the B processor only.  The B proc...