Browse Prior Art Database

Modified Cache Update Cycle for Intel 82385 Based Systems

IP.com Disclosure Number: IPCOM000101599D
Original Publication Date: 1990-Aug-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 2 page(s) / 64K

Publishing Venue

IBM

Related People

Capps, LB: AUTHOR [+5]

Abstract

This article describes a technique for interfacing a 64-bit-wide memory bus to a 32-bit-wide cache bus on Intel 82385 cache controller based systems.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 62% of the total text.

Modified Cache Update Cycle for Intel 82385 Based Systems

       This article describes a technique for interfacing a
64-bit-wide memory bus to a 32-bit-wide cache bus on Intel 82385
cache controller based systems.

      In a previous design, a method for extending Intel's 32kb cache
controller to 64kb was implemented.  In this implementation the basic
cache update cycle was modified to transfer 64 bits of information
from main memory into cache.  The 64-bit transfer was conducted using
two, 32-bit read/write operations.  As an alternative transfer
mechanism, the main memory bus width could be increased to 64 bits.
Such an increase in memory bus width is a standard way to improve
performance.  Ideally, the 64-bit-wide bus could then be used in a
single dynamic RAM (DRAM) read, static RAM (SRAM) write operation.
In a single read/write operation a buffer is required to reduce the
SRAM bus to 32 bits.  The addition of this buffer now places demands
on SRAM bus to 32 bits and on SRAM access times in excess of
available technology.  The technique disclosed herein features a
method of using the 64-bit-wide bus in conjunction with the 82385
cache controller to allow a faster cache update cycle once the cache
has been extended to 64kb.  The method used optimizes the update
cycle time to allow the use of available SRAM technology.

      The drawing is a timing diagram of the modified cache update
cycle of this disclosure.  As shown, it consists of a single DRA...