Browse Prior Art Database

Computer System Bus Protocol Translation Method

IP.com Disclosure Number: IPCOM000101615D
Original Publication Date: 1990-Aug-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 3 page(s) / 94K

Publishing Venue

IBM

Related People

Eng, RC: AUTHOR [+3]

Abstract

A technique is described whereby a bus protocol translator is utilized in a two-signal bus protocol computer system, so as to provide compatibility with already existing input/output (I/O) circuitry. The translator provides bidirectional translation between primary and secondary bus protocol signals.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Computer System Bus Protocol Translation Method

       A technique is described whereby a bus protocol
translator is utilized in a two-signal bus protocol computer system,
so as to provide compatibility with already existing input/output
(I/O) circuitry.  The translator provides bidirectional translation
between primary and secondary bus protocol signals.

      When a new computer system is introduced, it is often desirable
to provide facilities within the new system to enable I/O devices
used in the existing systems to be operationally compatible with the
new system. Usually, a system bus contains the electrical signals
necessary to provide controls between one or more bus master and
slave adapter circuits.  The master circuits originate the control of
the bus signals as well as receive signals, whereas the slave adapter
circuits only receive signals.

      The concept described herein provides an improvement over prior
art in that signals are present on the system bus, so as to support
two bus protocols.  A single translator is used to eliminate the need
for each I/O device to be equipped with its own translator.  All I/O
devices have the ability to receive signals from both primary and
secondary protocols.

      In the prior art, two methods were typically implemented to
provide the compatibility required for operation of I/O devices.
Fig.  1 illustrates a first prior-art method where two bus protocols
were utilized in one system to make up the system bus.  Bus master 10
included primary protocol interface 11 and secondary protocol
interface 12, which, in turn, were connected to primary protocol
signal bus 13 and secondary protocol signal 14.  These two buses made
up the system bus and require...