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Method for a film-strip spacer for centered-wirebonding die stacking

IP.com Disclosure Number: IPCOM000101709D
Publication Date: 2005-Mar-16
Document File: 4 page(s) / 181K

Publishing Venue

The IP.com Prior Art Database

Abstract

Disclosed is a method for a film-trip spacer for centered-wirebonding die stacking. Benefits include improved functionality, improved performance, and improved design flexibility.

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Method for a film-strip spacer for centered-wirebonding die stacking

Disclosed is a method for a film-trip spacer for centered-wirebonding die stacking. Benefits include improved functionality, improved performance, and improved design flexibility.

Background

              Conventionally, centered wirebonding is applied to dynamic random access memory (DRAM) dice due to its electrical/area efficiency. Bonding pads are typically placed aligned with the die edge for conventional memory/logic devices (see Figure 1). However, the conventional center bonding DRAM pad cannot fit in the stacked chip scale package (SCSP) structure.

              Future high-density/low-cost memories, such as DRAM, are expected to be required in mobile applications for game, multimedia, and entertainment services. As a result, a feasible process/structure for DRAM stacking is a requirement.

              No conventional method exists for stacking centered-wirebonding dice. The centered bond pad die is used on discrete packaging. For stacked dice, the centered bond pad die must be placed uppermost on the stack. As a result, only flash/static random access memory (SRAM) and logic devices are integrated in SCSPs, which have bonding pads along the die edge.

      Using a film spacer for stacking is a proven technology for conventional high-volume manufacturing.

General description

              The disclosed method is a film-strip spacer for centered-wirebonding die stacking. Dice are stacked with centered bond pads by applying two film strips. The film-strip spacer serves as a column for the die above and provides space for the wirebonding. The method enables conventional SCSPs to integrate DRAM devices by applying two parallel film adhesives with a spacer on the bottom die.

              The key elements of the disclosed method include:

•     Two parallel film adhesives/spacer attachment process

•     Double sided spacer film adhesive

•     Wirebonding process from the center pad of a DRAM die to a substrate with a tightly controlled loop height that does not to...