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Browse Prior Art Database

Technique to Improve Context Switching Performance in a CPU

IP.com Disclosure Number: IPCOM000101766D
Original Publication Date: 1990-Aug-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 2 page(s) / 74K

Publishing Venue

IBM

Related People

Krappweis, TG, Sr: AUTHOR

Abstract

The new generation of Reduced Instruction Set Computer (RISC) architectures contain large, general-purpose fixed-point and floating-point register files to enhance performance and facilitate compiler optimization. The increased number of general-purpose registers, however, causes the context switching (amount of time required for the CPU to switch between tasks) to increase since current CPU architectures necessitate saving all registers in the register file irregardless of whether they have been used.

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Technique to Improve Context Switching Performance in a CPU

       The new generation of Reduced Instruction Set Computer
(RISC) architectures contain large, general-purpose fixed-point and
floating-point register files to enhance performance and facilitate
compiler optimization.  The increased number of general-purpose
registers, however, causes the context switching (amount of time
required for the CPU to switch between tasks) to increase since
current CPU architectures necessitate saving all registers in the
register file irregardless of whether they have been used.

      By adding a reference bit to each general-purpose register,
only the registers which have been used by a program need to be saved
during a context switch.  A savings also occurs when restoring the
registers.  This technique can be used in any CPU architecture.

      A "reference register" can be used to keep track of which
registers have been used during program execution. Each bit in the
register can correspond to one of the general-purpose registers.
When a context switch occurs, the operating system can examine the
register to determine which registers to save.  The "reference
register" would also be saved during the context switch so that it
can be used to restore the appropriate registers.

      Since some CPUs provide single instructions to load or store
multiple contiguous general-purpose registers, a further improvement
to this technique can be realized by optimizing the...