Browse Prior Art Database

Expandable Rasterization Engine

IP.com Disclosure Number: IPCOM000101797D
Original Publication Date: 1990-Sep-01
Included in the Prior Art Database: 2005-Mar-16
Document File: 3 page(s) / 141K

Publishing Venue

IBM

Related People

Johnson, L: AUTHOR [+4]

Abstract

Currently there are two popular design points for rasterization processors. One is 8 bits per pixel or psuedo-color, the other 24 bits per pixel or true-color. Ideally, both 8- and 24-bit color would be supported by a single rasterization processor module, but often this is not practical because of pin count and/or silicon area.

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Expandable Rasterization Engine

       Currently there are two popular design points for
rasterization processors. One is 8 bits per pixel or psuedo-color,
the other 24 bits per pixel or true-color. Ideally, both 8- and
24-bit color would be supported by a single rasterization processor
module, but often this is not practical because of pin count and/or
silicon area.

      Assuming that it is not possible to put all the function of the
24-bit configuration into one chip, a two-chip solution is needed.
One method of doing this is to use two unique processors to support
24-bit color, the first or base handling 8 bits/pixel and the second
or option the remaining 16 bits/pixel. If only 8-bit color is
desired, only the base processor is needed. Unfortunately the time
and resources required to do the logic design, physical design, build
the masks, etc. for two chips is much greater than for one. Below we
will describe a method of using two copies of one unique design,
capable of operating in two different modes, to support both 8- and
24-bit color.

      We utilized a single rasterization processor design for both
the psuedo-color and the true color design point. In the case of
true-color, a second identical rasterization processor is added to
perform the additional function.  The two rasterization processors
communicate to share information and maintain synchronous
communication to both the front end processor and the display
monitor.  The figure shows two rasterization processors, a Base
Rasterization Processor and an Option Rasterization Processor.  The
Base Rasterization Processor controls three types of memory buffers:
an 8-bit pseudo-color frame buffer, a 24-bit depth (or Z) buffer, and
an attribute buffer.  The Base Rasterization Processor draws 8-bit
pixels into the frame buffer and has the capability of providing
depth tests utilizing the Z buffer and window tests utilizing the
Attribute Buffer. In a pseudo-color system the 8-bit pixel color
information is sent via the multiplexers to all three RAMDACs which
provide Blue, Green, and Red Video, respectively.  When the
pseudo-color system is expanded to a true-color system, the Option
Rasterization Processor is added.  The Option Rasterization Processor
is identical to the Base Rasterization Processor.  The Option
Rasterization Processor connects to a pair of 8-bit frame buffers -
the Green pixel buffer and the Red pixel buffer.  The green and red
pixel information is connected via multiplexers to the RAMDACs.  In
the base system, multiplexers choose the Base frame buffer data while
in the base + option system they choose the green and red frame
buffer data.

      During true color operations, the Base processor manipulates
and generates the Blue portion of the 24-bit pixel, while the Option
processor manipulates and generates both the Green and Red portions
of the 24-bit pixel. The Base processor determines the result of the
window tests and depth tests for eac...