Browse Prior Art Database

Novel Fabrication Process for Creating T-Gate Transistors

IP.com Disclosure Number: IPCOM000101859D
Original Publication Date: 1990-Sep-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 2 page(s) / 63K

Publishing Venue

IBM

Related People

Hong, JM: AUTHOR [+4]

Abstract

Disclosed is a process for fabricating submicron T-gate transistors for high frequency applications using two independent lithographic steps to define the gate.

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Novel Fabrication Process for Creating T-Gate Transistors

       Disclosed is a process for fabricating submicron T-gate
transistors for high frequency applications using two independent
lithographic steps to define the gate.

      In order to improve the performance of submicron transistors at
high frequencies, a T-gate (also called mushroom gate) structure can
be used to reduce the gate resistance.  Previous proposals have
involved complex processes that are unproven in manufacturing
environments (1, 2,3,4).

      The process steps are shown in the figure. The first
lithographic step defines the lower, narrow portion of the gate.
Through a combination of etching, deposition, and lift-off
techniques, the resist image is transferred into the substrate,
leaving an approximately planar structure with an insulating layer
everywhere except for the location of the narrow gate section.  A
second lithography step is then used to define the upper portion of
the gate.  The insulating layer (nitride in the figure) allows the
upper section of the gate to be fabricated independently of the lower
section of the gate, giving greater control of the shape of the gate
and allowing standard processing techniques to be used.

      Although the figure shows a specific set of processing steps
for a gallium arsenide FET transistor, the concept can be extended to
include, for example, silicon transistors, bipolar transistors,
negative resist processing instead of positive r...