Browse Prior Art Database

Method of Producing Small Vias in HDC-Type Structures

IP.com Disclosure Number: IPCOM000101878D
Original Publication Date: 1990-Sep-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Frankeny, JA: AUTHOR [+3]

Abstract

Disclosed is a method that puts very small vias in HDC substrates (.001 diameter).

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

Method of Producing Small Vias in HDC-Type Structures

       Disclosed is a method that puts very small vias in HDC
substrates (.001 diameter).

      Putting very small vias in HDC circuit structures is very
difficult.  The following is a new method for making through power
plane vias.

      A HDC substrate is made by first punching or etching holes in
the CIC power plane 1 where it is desired to have an isolated via.
The dielectric layers 2 are then laminated on the surfaces and in the
holes to create a potential 2S/1P structure.  See the figure.

      The next step is to place the substrate on a magnetic plate 6
with cavities behind each possible isolated via.  A small wire 3, 4,
.001 inch for .001 inch via, is fired into the substrate through a
filled hole using a special missile accelerator explained in (*).
The wire will have sufficient velocity to pierce the dielectric.  The
wire will stop when wire and removed material 5 hit the bottom of the
cavity in plate 6.

      The wires are then etched off 7 and vias are then contacted by
standard plating.  The power vias are punched by the standard HDC
punches and plated through as normally done.  Since most vias are
isolated, this technique takes advantage of small signal vias and
standard low inductance power vias.

      Reference
(*) "Device to Make Ultra Small Diameter Vias in PC Cards," IBM
Technical Disclosure Bulletin 33, 248-249 (September 1990, this
issue).