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Compensation of the Offset Introduced by a Sigma-Delta Converter With Return-to-Zero Pulses

IP.com Disclosure Number: IPCOM000101917D
Original Publication Date: 1990-Sep-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 2 page(s) / 42K

Publishing Venue

IBM

Related People

Ferry, M: AUTHOR [+3]

Abstract

Sigma-delta converters are designed with return-to-zero pulses in order to avoid the non-linearity effect due to the asymmetry of the 1-bit A/D converter. A feed-back system is described that compensates the offset systematically introduced by such a design.

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Compensation of the Offset Introduced by a Sigma-Delta Converter With Return-to-Zero Pulses

       Sigma-delta converters are designed with return-to-zero
pulses in order to avoid the non-linearity effect due to the
asymmetry of the 1-bit A/D converter. A feed-back system is described
that compensates the offset systematically introduced by such a
design.

      Fig. 1 shows this offset as a function of the DC-signal V. The
importance of this offset is proportional to the width of the pulse.

      When the signal to be coded has no DC component (this is very
often the case in signal processing), it is possible to compensate
this offset by subtracting the logic complement of the return-to-zero
code.

      Fig. 2 shows an implementation of this system. The output
stream, with return-to-zero pulses 1 is inverted 2, and the DC
component of this inverted data is extracted with a low-pass filter
3. This DC component is exactly the opposite of the offset due to the
return-to-zero system. It can be added to the signal at the input of
the coder 4.