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Recovery Circuit for Magneto-Resistive Head Switching

IP.com Disclosure Number: IPCOM000101918D
Original Publication Date: 1990-Sep-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 2 page(s) / 77K

Publishing Venue

IBM

Related People

Kerwin, GJ: AUTHOR [+2]

Abstract

Disclosed is a technique for rapidly recovering from a DC voltage transient in a read preamplifier that results from switching between two unequal resistance magneto-resistive head elements. This scheme employs a secondary high-gain recovery loop that is activated and maintained via an external control line. When this high-gain loop is disabled, the coupling frequency of the amplifier returns to a sufficiently low frequency as to not degrade the channel performance. The recovery time is reduced by over an order of magnitude without compromising the read performance.

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Recovery Circuit for Magneto-Resistive Head Switching

       Disclosed is a technique for rapidly recovering from a DC
voltage transient in a read preamplifier that results from switching
between two unequal resistance magneto-resistive head elements.  This
scheme employs a secondary high-gain recovery loop that is activated
and maintained via an external control line.  When this high-gain
loop is disabled, the coupling frequency of the amplifier returns to
a sufficiently low frequency as to not degrade the channel
performance.  The recovery time is reduced by over an order of
magnitude without compromising the read performance.

      In the circuit of Fig. 1, recovering from a head switch
transient requires a subsequent change in the voltage across the
capacitor C.  The differential Operational Transconductance Amplifier
(OTA) does this by driving a current through the capacitor.  When a
head switch occurs, a differential voltage is developed between nodes
POTA and MOTA.  Recovery is achieved when this voltage is reduced to
zero volts.  The OTA can drive a current through the capacitor C in
either direction, as required, to achieve the desired recovery times.
The OTA is designed to drive a maximum 0.3 ma in normal operation.
Capacitor C is chosen to be sufficiently large so that at the 0.3 ma
charging current, its voltage cannot follow the small signal
waveforms at frequencies above 100 Hz.  This is the condition for
best system performance.  This techni...