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Full Swing Multi-Emitter BiCMOS Circuit Without Reverse Vbe

IP.com Disclosure Number: IPCOM000101923D
Original Publication Date: 1990-Sep-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 3 page(s) / 70K

Publishing Venue

IBM

Related People

Boudon, G: AUTHOR [+2]

Abstract

This disclosure relates to BiCMOS circuit implementations that eliminate the reverse base-emitter voltage usually faced by the bipolar transistors mounted in Emitter DOT configurations, as described in [*]. To take advantage of the speed improvement provided by the multi-base concept disclosed therein without inducing reverse Vbe voltage stresses on the emitter dotted transistors, two circuit alternatives are described hereafter:

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Full Swing Multi-Emitter BiCMOS Circuit Without Reverse Vbe

       This disclosure relates to BiCMOS circuit implementations
that eliminate the reverse base-emitter voltage usually faced by the
bipolar transistors mounted in Emitter DOT configurations, as
described in [*].  To take advantage of the speed improvement
provided by the multi-base concept disclosed therein without inducing
reverse Vbe voltage stresses on the emitter dotted transistors, two
circuit alternatives are described hereafter:

      1. MultiBase with Resistances (Fig. 1)
      The pull-down operation on the base terminal of the pull-up
transistors T1 and T2 is performed by resistors R1 and R2 connected
between their emitter and base terminals. This implementation is
faster than the conventional circuit that uses only one pull-up NPN
and parallel PFETs, because it takes advantage of the Emitter dotting
which induces less speed degradation than Drain dotting. There is no
DC reverse Vbe because the base of the transistors is maintained at
down level only when all the emitters are at down level. The optimal
resistor value is a compromise between high value which provides
better speed but more crossover current and low value which gives
lower speed but low crossover current (less power dissipation).

      2. MultiEmitter with Feedback loop (Figs. 2 and 3)
      The problem of multi-base circuit having the Base pull-down
operation performed by a NFET connected to ground is the reverse...