Browse Prior Art Database

Looping Scatter/Gather Bus Master to Coprocessor Data Transfer Mechanism

IP.com Disclosure Number: IPCOM000101936D
Original Publication Date: 1990-Sep-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 4 page(s) / 135K

Publishing Venue

IBM

Related People

Herndon, SB: AUTHOR [+2]

Abstract

This article describes a technique for use in a personal computer system wherein a scatter/gather facility is used in a "loop" fashion to provide rotating data buffer queue control. Using this in conjunction with a buffer transfer complete Interrupt ID and Attention Continue commands, provides a paced transport mechanism for the transfer of data to coprocessor memory via the transfer ports in main memory.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Looping Scatter/Gather Bus Master to Coprocessor Data Transfer Mechanism

       This article describes a technique for use in a personal
computer system wherein a scatter/gather facility is used in a "loop"
fashion to provide rotating data buffer queue control.  Using this in
conjunction with a buffer transfer complete Interrupt ID and
Attention Continue commands, provides a paced transport mechanism for
the transfer of data to coprocessor memory via the transfer ports in
main memory.

      A small computer system interface (SCSI) adapter card which is
designed specifically for a personal computer system MICRO CHANNEL*
bus and environment contains logic to perform bus master operations
as well as an internal microprocessor which handles the multiple
outstanding SCSI requests as well as the command interpretation and
execution as directed by the system.  The command interface with the
system is control block driven.  A control block containing all the
information needed to execute the SCSI command including buffer
addresses and lengths is built in memory.  These control blocks are
called subsystem control blocks (SCBs). The operation is initiated by
writing to a control register on the card.  The card then reads in
the control block and performs the requested operation ultimately
retrieving or storing data in the system memory and then storing an
ending status block also in system memory.  The ending status block
is called a termination status block (TSB).

      The card is very efficient at storing or retrieving data in
system memory.  It can store the data in a contiguous block or in
scatter- gather mode where the data locations can be dispersed or
scattered throughout system memory.  This operation is signaled by a
bit in the control block and a pointer to a list of buffer addresses
and sizes.

      In a coprocessor environment for which the system MICRO CHANNEL
is designed, there are configurations where system memory may not be
the final destination for the data. Coprocessors may have dedicated
memory with less than full memory maps into system memory.  That is,
an area of system memory may be designed as a transfer port through
which the data is passed on to the coprocessor memory.  The port may
be small compared to the size of the coprocessor memory. The solution
to this is to provide a facility called loop-scatter-gather (LSG)
which allows the full size of the request to be sent to the device,
even though the buffer available is very small and must be reused.

      LSG allows the size of the request to the device to be
independent of the amount of buffer space available and also allows
the reuse of the same buffer space.  The function is signalled to the
card by using a bit in the SCB which indicates the operation s...