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Single Cycle Accumulator

IP.com Disclosure Number: IPCOM000102001D
Original Publication Date: 1990-Oct-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 2 page(s) / 74K

Publishing Venue

IBM

Related People

Dever, SF: AUTHOR [+2]

Abstract

Single cycle operation is achieved by summing (or subtracting) path operands with a full adder in carry and sum format rather than a regular adder in sum format with carries resolved. A full adder does not add the carry bits to the sum bits, i.e. leaves the carries unresolved, and thus is a faster adder. More data bits can be summed in a given cycle time than with a regular adder. This allows least significant guard bits to be appended to maintain data precision as needed. In general, since the accumulator is unnormalized (contains leftmost place holding bits), the accumulator word size is larger than the number of data bits.

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Single Cycle Accumulator

       Single cycle operation is achieved by summing (or
subtracting) path operands with a full adder in carry and sum format
rather than a regular adder in sum format with carries resolved.  A
full adder does not add the carry bits to the sum bits, i.e. leaves
the carries unresolved, and thus is a faster adder.  More data bits
can be summed in a given cycle time than with a regular adder.  This
allows least significant guard bits to be appended to maintain data
precision as needed.  In general, since the accumulator is
unnormalized (contains leftmost place holding bits), the accumulator
word size is larger than the number of data bits.

      Numbers in the accumulator are represented in signed two's
complement notation.  When two numbers are added, an overflow (carry
into the sign bit) may occur which leaves the resulting sum in error.
To detect possible overflows in carry and sum format, a unique
overflow detection scheme is employed.  Refer to the figure for the
following explanation:

      Operands to be accumulated are latched in the P register in
signed two's complement notation, while the C register contains the
previous accumulated carry data word and the S register contains the
previous sum word.

      The next section contains the two's complementers for the carry
and sum data words and a one's complementer for the P data word.
This section allows subtraction of the accumulator from the P reg
data or the P reg data fr...