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Intelligent Bus Controller - DMA Slave Communication

IP.com Disclosure Number: IPCOM000102015D
Original Publication Date: 1990-Oct-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 2 page(s) / 89K

Publishing Venue

IBM

Related People

Liguori, DJ: AUTHOR

Abstract

An extension to the MICRO CHANNEL* Architecture is disclosed and, in particular, the definition of a bus master device referred to as an Intelligent Bus Controller.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 51% of the total text.

Intelligent Bus Controller - DMA Slave Communication

       An extension to the MICRO CHANNEL* Architecture is
disclosed and, in particular, the definition of a bus master device
referred to as an Intelligent Bus Controller.

      Currently the Low End Parallel Bus Family 2 architecture has
two separate types of non-system bus masters, i.e., a direct memory
access (DMA) Controller and an Intelligent Bus Controller. The DMA
Controller does not initiate a request for the bus, but gains control
of the bus after a DMA slave has successfully arbitrated for the bus.
The Intelligent Bus Controller can arbitrate for use of the bus on
its own. A problem arises when an Intelligent Bus Controller wishes
to directly communicate with a DMA slave. As systems become populated
with a number of Intelligent Controllers and DMA slaves, a need
arises for these devices to communicate with each other. Because
Intelligent Bus Controllers cannot know when a DMA slave has
successfully arbitrated for the bus, they rely on a separate DMA
controller to transfer a block of data to a DMA slave. This can be
done in one of two ways. The Intelligent Controller can transfer its
data to a block of memory accessible to the DMA Controller and
instruct the DMA Controller to transfer this data to the DMA slave.
This method requires two block transfers, or the Intelligent
Controller can make itself accessible to the DMA Controller so that
the DMA Controller can transfer the data directly to the DMA slave.
In this case the DMA Controller must have the capability of
performing transfers between the Intelligent Bus Controller and a DMA
slave and forces the transfer to proceed at the speed of the DMA
Controller.

      By extending the MICRO CHANNEL Architecture to enable an
Intelligent Bus Controller to directly service a DMA slave, a means
is provided for a bus controller to respond directly to the
arbitration level of the DMA slave. This provides the Intelligent Bus
Controller with not only a means for gaining control of the bus with
its own arbitration level, but also a means for taking control of the
bus when a DMA slave assigned to the controller has successfully
arbitrated for the bus.

      By combining the concepts of two exis...