Browse Prior Art Database

IOP Task Switching

IP.com Disclosure Number: IPCOM000102033D
Original Publication Date: 1990-Oct-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 3 page(s) / 120K

Publishing Venue

IBM

Related People

Glassen, SG: AUTHOR [+4]

Abstract

Disclosed is a design that allows two independent tasks to time share a Reduced Instruction Set Computer, in this case an Input/Output Processor (IOP). This design will also decrease the response time for high priority tasks.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 48% of the total text.

IOP Task Switching

       Disclosed is a design that allows two independent tasks
to time share a Reduced Instruction Set Computer, in this case an
Input/Output Processor (IOP).  This design will also decrease the
response time for high priority tasks.

      Normally, these types of processors run tasks in a serial
fashion.  Once a task is started, it has to run to completion before
another task can be started.  This is acceptable, except for the
times when the microcode must wait for a storage request to complete
before it can continue.  During this wait time the processor is not
performing useful work.  Since these storage requests take many
cycles, it was decided to take advantage of this wait time.  This
design allows for a second task to be started before the first has
completed.  When a task issues a storage request, the hardware will
determine if another task is waiting to be run by this processor.  If
so, then the hardware will save the facilities (e.g., GPRs,
Instruction Counter, etc.) required by this task and allow the second
task to start running.  When the second task issues a storage
request, the hardware will determine if the first task's storage
request has completed.  If so, then the hardware will allow the first
task to resume running.

      This design also allows for a task to be preempted by another
task with higher priority.  This allows for a higher priority task to
preempt a task that is running without having to have the current
task issue a storage request. The first task will continue when a
task switch occurs to give control back to the first task.  This
should decrease the response time for these high priority tasks.

      A Task Switch instruction is defined to be used to switch
control to the other task whenever the microcode may deem
appropriate.  When a task switch instruction is decoded and the other
task is waiting to run, a switch occurs.  If the other task is not
waiting to run, then the task switch instruction is effectively a
no-op.

      Each task has its own copy of facilities that is needed to
execute a task.  Only one set of these facilities are in control at
one time.  When a task switch occurs, the current task's facilities
are saved by the hardware and the second task's facilities become the
current facilities.  Both tasks will share the dataflow.  Each task
has two associated control latches: a wait latch and a suspend latch.
The wait latch indicates a task is ready to run.  The suspend latch
indicates a task has issued a storage request and the task can
relinquish control to the other task.  When the wait latch of a task
is on and the suspend latch of the other task is on, the hardware
will give control to the task waiting to run.

      Three control bits are used to control the task switching
function.  Each task has its own copy of these control bits.
Whichever task is in control, only its control bit is active.  The
bits are defined as foll...