Browse Prior Art Database

Zero Detecting Non-Restoring Divider

IP.com Disclosure Number: IPCOM000102193D
Original Publication Date: 1990-Nov-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 4 page(s) / 111K

Publishing Venue

IBM

Related People

Freerksen, DL: AUTHOR [+2]

Abstract

Performing floating-point (FP) divide has been one of the slowest floating-point operations. For example, if we use the standard non- restoring divider, it will take 52 iterations to divide a standard double-precision FP number. During these machine cycles, the processor simply waits until the operation is done, which causes system performance degradation. The divide scheme described here provides good performance at a very low circuit cost. An additional advantage of this scheme is that some simple numbers would divide very fast.

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Zero Detecting Non-Restoring Divider

       Performing floating-point (FP) divide has been one of the
slowest floating-point operations.  For example, if we use the
standard non- restoring divider, it will take 52 iterations to divide
a standard double-precision FP number. During these machine cycles,
the processor simply waits until the operation is done, which causes
system performance degradation.  The divide scheme described here
provides good performance at a very low circuit cost.  An additional
advantage of this scheme is that some simple numbers would divide
very fast.

      Implementation
1.   Compare the dividend to the divisor, and generate the multiple.
Look at a certain number(X) of bits of the dividend and divisor, and
decide which multiple to choose.  The table shown in Fig. 1 describes
how the multiples can be selected.
2.   Shift zeros, and determine the quotient bits. The zeros in the
most significant bits of the partial dividend will determine the
number of bits to be shifted and the number of quotient bits to be
generated.  For example, if the dividend is 0001XX.., then the
quotient bits will be XX0 (XX will be 00 from 0 multiple, 01 from the
1/2 multiple and 10 from the 1 multiple).  If only one quotient bit
can be generated, it is because the guess was not close enough to
allow two or more bits.  In this situation the 2nd bit will be
determined the next cycle by adding the first bit of the next
quotient.  Figs. 2 through 4 show various examples of this divide
scheme in action.  Everywhere an '*' shows up an addition needs to
take place. Everywhere a '#' shows up the quotient is not totally
determined yet.  These examples were implemented using a 4-bit
compare scheme...