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Hardware Description Language Modeling for Analog-Digital Hardware Designs

IP.com Disclosure Number: IPCOM000102205D
Original Publication Date: 1990-Nov-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 5 page(s) / 163K

Publishing Venue

IBM

Related People

Brown, MW: AUTHOR [+2]

Abstract

Disclosed is a novel approach using the Very-High-Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) to model the analog-digital interaction. The details and novel application of the general simulation model structure of Fig. 1 to analog circuits constitute the invention.

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This is the abbreviated version, containing approximately 52% of the total text.

Hardware Description Language Modeling for Analog-Digital Hardware Designs

       Disclosed is a novel approach using the Very-High-Speed
Integrated Circuit (VHSIC) Hardware Description Language (VHDL) to
model the analog-digital interaction.  The details and novel
application of the general simulation model structure of Fig. 1 to
analog circuits constitute the invention.

      A general simulation model will be described in two parts.  The
first describes the general model structure of Fig. 1 in "Model
Structure"; the second provides a detailed analog applications
description of that model structure in "Application to Analog
Circuits".

      The basic VHDL model structure of Fig. 1 is divided into HDL
aspects and programming language aspects.

      HDL Aspects: The two major HDL constructs used are components
and signals.  Components represent functional blocks while signals
pass information between the functional blocks. Components consist of
entities and architectures.  Entities describe the interface to the
component, while the architecture describes the structural contents
and behavioral function of the component. Pertinent interface
information found in the Entity includes ports for signal
connections, generics for parameter passing, and assertions for
interface error checking/ handling during simulation.  Important
internal constructs contained in the architecture include component
instantiations (references to and interconnection of components
nested one level lower in the hierarchy), signal assignments, and
function calls.

      Signals are the other important HDL construct depicted in Fig.
1.  They transfer information between components during simulation.
Signals can be of various types including arrays, records, and
scalars.  Multiple signal assignments may drive the same signal
(dotting) when a function defining the net result is specified.  In
VHDL this function is called a bus resolution function.  Finally,
since VHDL is strongly- typed, signals that serve as constant voltage
or current references can be uniquely typed, allowing for early error
detection at compile time.

      Programming Language Aspects The programming language aspects
of VHDL resemble those found in other programming languages, such as
Ada. One of these important as pects, the package, allows the user to
define a collection of types and functions and group them together.
The general model of Fig. 1 uses several packages.  The lowest
contains bus resolution functions for determining the net result for
dotted signals of various types including those defined in the next
higher package, the data structure.  The data structure package
contains signal-type definitions, component-type definitions and the
global analog time delta constant used in f...