Browse Prior Art Database

Force Secondary Lookaside Buffer Miss

IP.com Disclosure Number: IPCOM000102207D
Original Publication Date: 1990-Nov-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 2 page(s) / 82K

Publishing Venue

IBM

Related People

Imming, KC: AUTHOR [+5]

Abstract

In a processor that uses virtual addressing, a Translation Lookaside Buffer is often used to improve the performance of converting a virtual address to a real main storage address. This buffer is generally implemented as an array. Described is a method that allows a processor to continue to operate after a failure in its Translation Lookaside Buffer, or in the logic surrounding the buffer.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Force Secondary Lookaside Buffer Miss

       In a processor that uses virtual addressing, a
Translation Lookaside Buffer is often used to improve the performance
of converting a virtual address to a real main storage address. This
buffer is generally implemented as an array.  Described is a method
that allows a processor to continue to operate after a failure in its
Translation Lookaside Buffer, or in the logic surrounding the buffer.

      In a processor that uses virtual addressing, a Translation
Lookaside Buffer (referred to in the title as a Secondary Lookaside
Buffer) is often used to improve the performance of converting a
virtual address to a real main storage address.  The lookaside buffer
holds the most recently used virtual vs real address pairs.  During a
virtual address translation, the lookaside buffer is checked to see
if the virtual address is present.  If a matching virtual address is
found, the real address can be read from the array.  If the virtual
address is not found, a "lookaside buffer miss" occurs, and the
primary directory must be searched in main storage to complete the
translation process.

      A Translation Lookaside Buffer is often implemented as a static
random-access memory array either internal to a logic chip or
external in standalone arrays.  If a failure occurs in one of these
arrays, the processor cannot continue to operate since the integrity
of a virtual to real address translation cannot be guaranteed.  Two
methods are described here to allow a processor to operate with a
failing lookaside buffer array.

      The first method is to provide a control register bit in the
lookaside buffer logic to force a lookaside buffer miss to occur on
every virtual address translation.  If this bit is set, the lookaside
buffer is effectively removed from the translation process and all
translations are done using the primary directory in main storage.
The control register bit could be set by software as part of a system
startup routine which performs a test of th...