Browse Prior Art Database

Hardware Assist for Bidirectional Presentation of Data to Work Stations

IP.com Disclosure Number: IPCOM000102447D
Original Publication Date: 1990-Nov-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 3 page(s) / 111K

Publishing Venue

IBM

Related People

Dancker, GA: AUTHOR [+2]

Abstract

Data for a Work Station (W/S) is typically displayed from left to right. Some languages (i.e., Arabic/Hebrew) require data to be presented from right to left as well as from left to right (in other words, bidirectional). This article describes how the Work Station Controller (WSC) hardware can be designed to assist with the bidirectional presentation of data. This reduces WSC microprocessor (MP) utilization, reduces cabling bandwidth utilization, saves WSC buffers, and improves overall WSC performance.

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This is the abbreviated version, containing approximately 52% of the total text.

Hardware Assist for Bidirectional Presentation of Data to Work Stations

       Data for a Work Station (W/S) is typically displayed from
left to right.  Some languages (i.e., Arabic/Hebrew) require data to
be presented from right to left as well as from left to right (in
other words, bidirectional).  This article describes how the Work
Station Controller (WSC) hardware can be designed to assist with the
bidirectional presentation of data.  This reduces WSC microprocessor
(MP) utilization, reduces cabling bandwidth utilization, saves WSC
buffers, and improves overall WSC performance.

      A typical WSC always transmits/receives data to/from a display
or printer in the order it is stored in the WSC memory.  One example
of this type of hardware uses Direct Memory Access (DMA) to read
control information from memory. This control block information can
contain a data buffer address pointer, a byte count, direction
(transmit/ receive), port/station address, etc.  DMA is also used to
read the data from memory to send to a W/S.  The WSC Licensed
Internal Code (LIC) sets up the control block information and starts
the adapter logic.  The adapter logic then reads the data to send to
the W/S.  Fig. 1 is an example of this.

      To send the data in reverse order (for right to left
presentation of data) would require the WSC LIC to reverse the data
in WSC memory before the hardware transmits the data to the W/S.
This increases the WSC MP utilization, uses extra buffers for the
temporary storage of data, and slows down overall WSC performance.
Fig. 2 illustrates this right to left presentation of data.

      This article describes a hardware design that assists with the
right to left presentation of data.

      Features are:
      1.  Reduces MP utilization, thus improving overall WSC
performance.
   2.  Saves WSC buffers (sections of WSC storage used for temporary
data storage).
      3.  Saves I/O operations (transmit/receive time to/from W/S).
      4.  Simplifies LIC structure.

      To assist with the right-to-left presentat...