Browse Prior Art Database

Medium Power Push-Pull With Input Logic

IP.com Disclosure Number: IPCOM000102470D
Original Publication Date: 1990-Nov-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 2 page(s) / 33K

Publishing Venue

IBM

Related People

Chan, F: AUTHOR [+2]

Abstract

This circuit reduces delay and power and area used to perform a logic function and off-chip drive.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

Medium Power Push-Pull With Input Logic

       This circuit reduces delay and power and area used to
perform a logic function and off-chip drive.

      A typical embodiment is shown in the figure.  The logic
functions offered are two-way selector, AND, OR, Exclusive OR.  In
the previous art to accomplish the logic function, the off-chip drive
required the use of a logic circuit and a driver circuit.  With this
scheme only a driver circuit is required to perform both the logic
function and the off-chip drive.  This reduces the delay, power and
area associated with the logic circuit.

      The scheme replaces the standard DCS front end with the front
end of a logic circuit (see the figure).