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Bidirectional Hardware Repair Bus for Sensing/Modifying Hardware Functions

IP.com Disclosure Number: IPCOM000102472D
Original Publication Date: 1990-Nov-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 2 page(s) / 65K

Publishing Venue

IBM

Related People

Haess, J: AUTHOR [+4]

Abstract

The concept of this article is to make VLSI logic chips repairable to avoid remanufacture.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Bidirectional Hardware Repair Bus for Sensing/Modifying Hardware Functions

       The concept of this article is to make VLSI logic chips
repairable to avoid remanufacture.

      Similar to a spare logic which is used in a VLSI chip to carry
out repairs by spare circuits and a changed wiring layer in the last
metal, spare I/Os are employed for repairs at a later stage.
According to their function, such a group of I/Os are referred to as
a repair bus.

      Compared with on-chip spare circuits, this approach offers
significant advantages in time.  Its effectiveness depends on the way
it is used for a particular application.

      As the most critical areas of the chip are normally known to
the logic designer, it is easy for him to determine points within the
control logic to which the repair bus may be connected for
manipulating the chip function from the chip I/Os.

      Typical connection points for the repair bus are points in the
control logic where a wait condition can be influenced from a decode
or dedicated bit of the repair bus. This allows manipulating the
control sequence by the repair bus as a function of an external
signal or a decode bit that can be changed very rapidly.  As a
result, problems detected during debugging or testing are eliminated.

      A repair bus connection may also be implanted in the area of
the OP-decoder where a critical or non-functioning instruction
sequence can be interrupted by inserting an NOP (no operation) step,
forcing an NOP decode by the repair...