Browse Prior Art Database

Improved VX Generator

IP.com Disclosure Number: IPCOM000102506D
Original Publication Date: 1990-Nov-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Banker, DC: AUTHOR [+3]

Abstract

Disclosed is a design of a bias generator that is ideal for VLSI applications. The design provides sufficient output impedance which limits the current draw of individual generators tied into a large bias network, (a situation commonly known as "current hogging"), while maintaining a fast circuit response time. (Image Omitted)

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Improved VX Generator

       Disclosed is a design of a bias generator that is ideal
for VLSI applications.  The design provides sufficient output
impedance which limits the current draw of individual generators tied
into a large bias network, (a situation commonly known as "current
hogging"), while maintaining a fast circuit response time.

                            (Image Omitted)

      In order to achieve these goals simultaneously, a small
resistance (typically < 20L) was placed in series with each generator
output which, after analysis, was shown to significantly reduce the
amount of "current hogging" present, without degrading the
generator's overall output time constant.  Resistors of this small a
magnitude, however, are extremely difficult to fabricate using
present monolithic technology.

      To address this concern, the resistance Re was placed in the
feedback loop of the bias generator (see the figure). This results in
an equivalent increase in output resistance of approximately:

                            (Image Omitted)

                         Re
                Reeqv   ----
                         G where G is the loop gain of the amplifier.

      Thus, the circuit designer can choose a value of resistance to
limit the amount of "current hogging" present which can be realized
using today's monolithic technology.