Browse Prior Art Database

Optimization of the Usage of "Almost All Good" Memory

IP.com Disclosure Number: IPCOM000102521D
Original Publication Date: 1990-Nov-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 4 page(s) / 140K

Publishing Venue

IBM

Related People

Bloom, EM: AUTHOR

Abstract

Almost All Good (AAG) memory defines computer memory chips with a limited threshold of failed bits that are utilized in a system as if they had no failed bits. Usage of this AAG memory creates potential additional initial and cumulative system failures. Disclosed herein are techniques of chip selection and card organization that substantially reduce the probability of these failures and allow AAG memory to be used with minimal system-reliability and cost impact. The implementation of this methodology is as follows: 1. Select modules by quadrant identification, i.e. o 4 part numbers with one and only one quadrant with a fail. These will be designated as AAG (3/4) modules. o 6 part numbers with two of four quadrants with fails.

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Optimization of the Usage of "Almost All Good" Memory

       Almost All Good (AAG) memory defines computer memory
chips with a limited threshold of failed bits that are utilized in a
system as if they had no failed bits.  Usage of this AAG memory
creates potential additional initial and cumulative system failures.
Disclosed herein are techniques of chip selection and card
organization that substantially reduce the probability of these
failures and allow AAG memory to be used with minimal
system-reliability and cost impact.
      The implementation of this methodology is as follows:
      1.  Select modules by quadrant identification, i.e.
           o  4 part numbers with one and only one quadrant with a
fail.
              These will be designated as AAG (3/4) modules.
           o  6 part numbers with two of four quadrants with fails.
              These will be designated as AAG (1/2) modules.
      2.  Organize the AAG cards with the distribution of failed
quadrants balanced on the card per ECC grouping, based upon the
approximate yield distribution of each of AAG (3/4) and AAG (1/2) in
groups of 4 and 6, respectively, as shown in Fig. 1.  Any shortage of
either AAG type should be substituted with AAG (3/4) for AAG (1/2) or
"All Good" (AG) for AAG (3/4).
3.  Even more optimal is to utilize the actual yield distributions
including "All Good" (AG).  An example of how the card could be
organized over time (as the "All Good" yield increases) in order to
maximize the defective chip usage and also minimize the probability
of not only initial alignment but system failures over time, is as
follows per 40 bit ECC group:
   AG        AAG (3/4)      AAG (1/2)
A) Feasibility Models         0            16             24
B) Eng. Models               12            16             12
C) Pre-GA Internals          16            12             12
D) GA (General Availability) 18            16              6
E) Post GA                   26             8              6
F) Ultimate                  28            12              0

      Fi...