Browse Prior Art Database

Silicide Etch-Stop On Polysilicon Contacts to Shallow N+ -P Junctions

IP.com Disclosure Number: IPCOM000102524D
Original Publication Date: 1990-Nov-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 2 page(s) / 68K

Publishing Venue

IBM

Related People

Bhattacharya, S: AUTHOR [+4]

Abstract

In semiconductor fabrication, the contact level studs have different heights due to SiO2 planarization and the topography of the silicon surface created from transistor processing. A typical stud process starts with planarization of SiO2, then stud hole formation by RIE, and finally filling of the holes with metal. Due to different stud heights, some holes are RIE'd to the bottom (opening the contact) before others. In order to open all the contacts, some holes must be over etched without damaging the underlying transistor. A solution to the problem is to use a conductive RIE etch stop.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 57% of the total text.

Silicide Etch-Stop On Polysilicon Contacts to Shallow N+ -P Junctions

       In semiconductor fabrication, the contact level studs
have different heights due to SiO2 planarization and the topography
of the silicon surface created from transistor processing.  A typical
stud process starts with planarization of SiO2, then stud hole
formation by RIE, and finally filling of the holes with metal.  Due
to different stud heights, some holes are RIE'd to the bottom
(opening the contact) before others.  In order to open all the
contacts, some holes must be over etched without damaging the
underlying transistor.  A solution to the problem is to use a
conductive RIE etch stop.

      It has been shown that PtSi and other silicides provide a good
RIE stop in fluoroform plasmas used to RIE oxide vias.  This provides
a means for forming the contact studs with different heights.
However, in the state-of-the-art bipolar transistor processing, the
emitter uses a non-silicide contact, because of severe leakage caused
by non-uniform reactions between Pt and Si, resulting in metal
penetration through the junction.

      Described here is a method which provides a means to build a
silicided emitter without causing junction leakage.

      It has been shown that junction leakage from silicide formation
is related to the thickness of polysilicon on the emitter, as shown
in Fig. 1.

      It is very difficult to simply increase the emitter polysilicon
thickness and then...