Browse Prior Art Database

Adaptive Control of Off-Chip Drivers

IP.com Disclosure Number: IPCOM000102638D
Original Publication Date: 1990-Dec-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 2 page(s) / 85K

Publishing Venue

IBM

Related People

Bartley, GK: AUTHOR [+3]

Abstract

This article addresses the problem of off-chip drivers having to drive different numbers of cards. In addition, it compensates for process, voltage, and temperature conditions. Designing circuits that drive from VLSI logic chips is complicated by the requirement for machine growth and featurability. This featurability normally is done by plugging in cards with additional functions. The number of I/O ports and the amount of memory, for example, are usually determined by the number and type of cards plugged into a system. Since the same driver has to adequately drive the most heavily loaded system, it must be designed with large devices. This can cause nets in a minimum configuration to be driven too strongly, resulting in voltage overshoot and stressing the circuits on receiving chips.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Adaptive Control of Off-Chip Drivers

       This article addresses the problem of off-chip drivers
having to drive different numbers of cards.  In addition, it
compensates for process, voltage, and temperature conditions.
Designing circuits that drive from VLSI logic chips is complicated by
the requirement for machine growth and featurability.  This
featurability normally is done by plugging in cards with additional
functions.  The number of I/O ports and the amount of memory, for
example, are usually determined by the number and type of cards
plugged into a system.  Since the same driver has to adequately drive
the most heavily loaded system, it must be designed with large
devices.  This can cause nets in a minimum configuration to be driven
too strongly, resulting in voltage overshoot and stressing the
circuits on receiving chips.

      This invention presupposes the availability of gated, segmented
drivers.  Such drivers have been described in the literature, for
example, "VLSI Performance Compensation for Off-Chip Drivers and
Clock Generation," which was presented at the IEEE CICC conference in
San Diego in May 1989.  Such drivers have been used to compensate for
process, temperature, and voltage variation.  These drivers are made
up of a number of parallel drivers.  Respective data input, tristate
enable input, and output of the driver segments are connected
together.  Each segment has a separate enable input that controls
whether that driver segment will be active.  By controlling the
number of driver segments active, the strength of the aggregate
driver can be controlled.

      During system bring-up (and, optionally, periodically during
normal operation), the following sequence should be performed.
1.  The driver should be set to minimum drive level with a single
segment enabled.
2.  Receiving chips are set (by scan or other means) to expect a
logic "1" to be sent.
3.  The signal bus is precharged to "0".  Several cycles should be
used to ensure full precharge.
4.  The driver should drive a "1" on the bus.  Receivers should latch
their input data under normal system timi...