Browse Prior Art Database

Method for Downloading Firmware to Ram

IP.com Disclosure Number: IPCOM000102667D
Original Publication Date: 1990-Dec-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 5 page(s) / 158K

Publishing Venue

IBM

Related People

Begun, RM: AUTHOR [+4]

Abstract

This article describes a method of downloading firmware to RAM in a personal computer system which provides the capability to use virtually any software debugger to debug the code which would eventually reside in firmware.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Method for Downloading Firmware to Ram

       This article describes a method of downloading firmware
to RAM in a personal computer system which provides the capability to
use virtually any software debugger to debug the code which would
eventually reside in firmware.

      On certain personal computer (PC) systems there is at least 64K
of code that resides in read-only memory (ROM) on the planar board.
Part of this code is responsible for bringing up the system.  This
bring-up code is commonly known as power-on self-test (POST).  POST's
primary job is to set up and ensure that a system's hardware
components are functioning properly.  Once set up, POST will ensure
the function by testing key hardware components that reside on the
system planar board.  Some of these components are vital to a
system's function as a whole and if a test fails the system is
halted.  Other tests are not that fatal and if the system fails one
of these, an error is simply flagged and reported.

      When a planar board is being developed, the POST code has to be
developed to initialize and test key hardware components.  Like any
software these tests have to be debugged until they do what they are
intended to.  When working with code that will eventually reside on
read-only storage (ROS) or erasable programmable ROMs (EPROMs), it is
hard to debug this code because the system being brought up is at a
premature state and because the code is resident on EPROMs.  This is
also complicated if there is no debug monitor to assist the code
developer.

      It is known that if the EPROMs did not have to be burned, it
would save a lot of time for every set burned (programmed).  To
accomplish this the minimal amount of power required on self-test is
decided such that the POST process could be stopped and downloading
the rest of the POST code and basic input output system (BIOS) into
ROS/RAM could begin.  This minimal POST code is called MINIPOST. Once
all the code is downloaded, the POST process is restarted and allowed
to execute normally.  The downloaded code running from RAM is
addressed as if it were running out of EPROM.  This is possible
because the planar memory card provided a way to switch 128K of its
address space to map that of the ROM space.  When this is done the
physical ROMs are invisible to the rest of the developing system.

      The downloading of the code is done through parallel ports.
This port was chosen because it is bidirectional.  A host PC system
reads the code from 2 files and sends 1 byte at a time through the...