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On Chip Clock Receiver Circuit

IP.com Disclosure Number: IPCOM000102742D
Original Publication Date: 1990-Jan-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 1 page(s) / 24K

Publishing Venue

IBM

Related People

Masenas CJ, Jr: AUTHOR

Abstract

A receiver circuit comprised of a resistor, capacitor, and a comparator circuit translates signals of varying level into signals suitable for operation of logic circuitry while preserving width of square wave clock pulses input to the receiver circuit.

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On Chip Clock Receiver Circuit

      A receiver circuit comprised of a resistor, capacitor, and a
comparator circuit translates signals of varying level into signals
suitable for operation of logic circuitry while preserving width of
square wave clock pulses input to the receiver circuit.

      Referring to the figure, input signal Vin is applied directly
to a non-inverting terminal (+) of comparator B12. Resistor R10 and
capacitor C11 act as a pass filter for the average, i.e., static or
DC component of voltage Vin. Voltage at inverting terminal (-) of
comparator B12 is therefore the average value of voltage Vin.  Output
signal Vout from comparator B12 is independent of up and down levels
of Vin.

      Disclosed anonymously.