Browse Prior Art Database

Array Compare

IP.com Disclosure Number: IPCOM000102863D
Original Publication Date: 1990-Mar-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 1 page(s) / 31K

Publishing Venue

IBM

Related People

Dean, A: AUTHOR [+2]

Abstract

Data external to a memory array is compared with data internal to the array by attaching compare elements directly to internal bit lines of the array. By this means, sense amplifier and buffer delays are avoided.

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Array Compare

      Data external to a memory array is compared with data internal
to the array by attaching compare elements directly to internal bit
lines of the array.  By this means, sense amplifier and buffer delays
are avoided.

      Referring to the figure, external data D0 comes directly into
AND circuit A0 and the true signal T0 of the array data bit B0 is
also fed to AND A0 directly from a bit line in array 2.  Data D0
is also fed through inverter I1 to AND A1 and the complement signal
C0 of the array data bit B0 also comes to AND A1.  Outputs from AND
circuits A0 and A1 go to OR circuit O1.  An output from O1,
indicating a match between external data bit D0 and array data bit
B0, then goes to AND circuit A2.  Not shown is that all other data
bits from the external data word are similarly compared with all
other data bits in the array word and fed to AND A2. Output from AND
A2 indicates equality between the external data word and the word
stored in array 2.

      Disclosed anonymously.