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Relaxed Control for Coherency in Selected Address Ranges

IP.com Disclosure Number: IPCOM000102914D
Original Publication Date: 1990-Mar-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 1 page(s) / 56K

Publishing Venue

IBM

Related People

Emma, PG: AUTHOR [+5]

Abstract

In environments where it is possible to associate specific locks with particular address ranges, coherency is guaranteed for accesses in these ranges as performed by the associated lock holders. By defining the locking primitive that returns the associated address range, it is possible to derive performance for accesses in that range in the following two types of cache requests: a Fetch-No-Data, and an Unconfirmed Fetch (UF). Both these cache requests would place no constraints on the temporal aspects of future accesses.

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This is the abbreviated version, containing approximately 68% of the total text.

Relaxed Control for Coherency in Selected Address Ranges

      In environments where it is possible to associate specific
locks with particular address ranges, coherency is guaranteed for
accesses in these ranges as performed by the associated lock holders.
By defining the locking primitive that returns the associated address
range, it is possible to derive performance for accesses in that
range in the following two types of cache requests: a Fetch-No-Data,
and an Unconfirmed Fetch (UF).  Both these cache requests would place
no constraints on the temporal aspects of future accesses.  For
store-in (WI) caches or caches which require that lines which are
stored into must be held exclusive (WTWAX), a fetch-no-data request
occurs when a line which is held Read Only (RO) is the target of a
store access, and a UF occurs when a line held exclusively in another
cache is acquired from the memory hierarchy without that exclusivity
first being terminated.

      The method of acquiring the lock and thereby the associated
range can be done in several ways.  In particular, the microcode of
the Compare & Swap (CS) instruction can be defined in this way and in
a manner that is transparent to the application program.  Only three
things are required for the implementation:
 1.  When initiating an address space for use by an applica
tion program, the operating system must establish a cor
respondence between the lock variables and subspaces within the
address space;
     ...