Browse Prior Art Database

Method to Reduce Chip Yield Loss Due to Fuses Incorrectly Blown

IP.com Disclosure Number: IPCOM000103002D
Original Publication Date: 1990-May-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 1 page(s) / 33K

Publishing Venue

IBM

Related People

Barth, JE, Jr.: AUTHOR [+4]

Abstract

By adding an additional fuse to each fuse bay on a memory chip, a fuse blown in error may be disabled by causing power-off in that fuse bay and enabling an unused fuse bay. Memory chip yield loss due to incorrectly blown fuses is significantly reduced by this technique which only requires an additional fuse-blowing step if an error occurs in the first fuse-blowing process.

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Method to Reduce Chip Yield Loss Due to Fuses Incorrectly Blown

      By adding an additional fuse to each fuse bay on a memory chip,
a fuse blown in error may be disabled by causing power-off in that
fuse bay and enabling an unused fuse bay. Memory chip yield loss due
to incorrectly blown fuses is significantly reduced by this technique
which only requires an additional fuse-blowing step if an error
occurs in the first fuse-blowing process.

      The yield impact of fuse-blowing errors can be significant in
very large memory arrays.  By the addition of a single fuse and only
one extra standard fuse detect circuit to each fuse bay, which
requires very little additional space, and the addition of a second
fuse blowing process step for only those chips containing a
fuse-blowing error, this yield impact is greatly reduced.

      Product flow is: 1) wafer test, 2) fuse blow, 3) retest, 4)
back to fuse flow if an error is found, and thence to standard
packaging and module testing.  Yield of correct fuse blowing is high
enough that errors in the second fuse blowing step may be ignored as
suggested by the above product flow sequence.

      Disclosed anonymously