Browse Prior Art Database

Flow Rules Processing for Controlling Multiple Test Processes

IP.com Disclosure Number: IPCOM000103018D
Original Publication Date: 1990-May-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 1 page(s) / 44K

Publishing Venue

IBM

Related People

Dorrington, AW: AUTHOR [+4]

Abstract

Disclosed is a flow rules processor concept which provides a generic and dynamic test control mechanism. The rules processor allows the flexibility to test a variety of products using one or more processes with little or no impact to the base test control functions.

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This is the abbreviated version, containing approximately 100% of the total text.

Flow Rules Processing for Controlling Multiple Test Processes

      Disclosed is a flow rules processor concept which provides a
generic and dynamic test control mechanism.  The rules processor
allows the flexibility to test a variety of products using one or
more processes with little or no impact to the base test control
functions.

      The implementation of flow rules processing for a test
environment is accomplished by using three modules and four tables,
as shown in the drawing figure.  The flow rules processor can execute
user-defined modules/procedures, process the user- defined operation
test sequence, or call the micro-routing processor.  These modules
always return a flow control code to the flow rules processor.  The
initial processing is started by passing the initial flow control
code and reading the current mode from the status table. Once the
process is started, the mode is controlled by the flow rules
processor and the flow control code is controlled by the
user/system-defined applications, operation test sequence processor
or the micro-routing processor.  This process will continue until the
mode and flow control code call for the exit of the flow rules
processor.

      Disclosed anonymously.