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Dual-Port ECL RAM Cell with a Standby-Accessed Read Port and a Send-Port Controlled Standby-Current Source

IP.com Disclosure Number: IPCOM000103064D
Original Publication Date: 1990-May-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 1 page(s) / 55K

Publishing Venue

IBM

Related People

Chuang, C-T: AUTHOR [+2]

Abstract

Disclosed is a dual-port ECL RAM cell with a standby-accessed read-only port and the use of a second-port controlled standby-current source to improve the cell stability and read access time for the second port.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 77% of the total text.

Dual-Port ECL RAM Cell with a Standby-Accessed Read Port and a Send-Port Controlled Standby-Current Source

      Disclosed is a dual-port ECL RAM cell with a standby-accessed
read-only port and the use of a second-port controlled
standby-current source to improve the cell stability and read access
time for the second port.

      The implementation of the concept is depicted the figure where
TB1 and TB2 are the read transistors for the second (read-only) port.
The read access time for the second port is limited by the allowable
read current based on cell stability consideration.  The base current
drawn by the second-port read transistor (TB1/TB2) must remain small
compared with the cell standby current to assure that the second-port
access does not disturb the state of the cell. For resistor-load
cell, this criterion can be easily met while still maintaining a
large enough second-port read current for high-speed operation.  On
the other hand, this constraint does impose a severe limitation on
the allowable second-port read current (and hence the speed) for
pnp-load cell where the standby current is much smaller.

      This dilemma can be resolved by the use of a second-port
controlled current source to increase the standby-current of the
cells on the selected (2nd port) wordline, thereby improving the cell
stability and read access time for the second-port simultaneously.
This second-port controlled standby-current source is implemented in
the figure by T2 an...