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Chip Power-Up Circuit to Control Off-chip Drivers

IP.com Disclosure Number: IPCOM000103081D
Original Publication Date: 1990-Jun-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 1 page(s) / 40K

Publishing Venue

IBM

Related People

Bush, BE: AUTHOR [+4]

Abstract

By means of a circuit added on a memory chip which disables off-chip drivers (OCDs) until a few chip select pulses have been received, data output currents are avoided during initial power-up. The circuit is comprised of a multi-stage counter which powers-up in a reset state which deactivates the OCDs. When a preselected number of valid chip select pulses is received by the counter, the OCDs are enabled.

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Chip Power-Up Circuit to Control Off-chip Drivers

      By means of a circuit added on a memory chip which disables
off-chip drivers (OCDs) until a few chip select pulses have been
received, data output currents are avoided during initial power-up.
The circuit is comprised of a multi-stage counter which powers-up in
a reset state which deactivates the OCDs.  When a preselected number
of valid chip select pulses is received by the counter, the OCDs are
enabled.

      Referring to the figure, counter 2 is reset by an output from
existing power up detect circuit 4.  Chip enable pulses CE enter NAND
6.  An output pulse from NAND 6 increments counter 2 by one step.  It
is assumed that the first few chip enable pulses are random until the
system logic stabilizes.  When counter 2 reaches full count as
determined by the connections to logic gate NAND 8, OCD 10 disable
input line 12 switches from a high to a low logic level.  OCD 10 is
thereby enabled and NAND 6 closed. Additional chip enable pulses are
ignored by NAND 6 until counter 2 is reset again.  Additional lines
shown on OCD 10 are: external output enable 14, data-in 16, and
data-out 18.

      This circuitry added to a memory chip eliminates high system
memory power-up current pulses and further improves system
reliability since OCDs are not driving into other OCDs
simultaneously.

      Disclosed anonymously.