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Feedback Devices for a Fast Sense Amplifier

IP.com Disclosure Number: IPCOM000103085D
Original Publication Date: 1990-Jun-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 1 page(s) / 44K

Publishing Venue

IBM

Related People

Chu, AM: AUTHOR [+2]

Abstract

By adding two N-type feedback transistors to a standard passive complementary metal oxide silicon (CMOS) sense amplifier circuit, bit lines are discharged to ground quickly. Thus, switching time of the sense amplifier is reduced significantly.

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Feedback Devices for a Fast Sense Amplifier

      By adding two N-type feedback transistors to a standard passive
complementary metal oxide silicon (CMOS) sense amplifier circuit, bit
lines are discharged to ground quickly.  Thus, switching time of the
sense amplifier is reduced significantly.

      Referring to the figure, transistors T1 and T2 are added to a
conventional CMOS sense amplifier circuit to increase speed of the
sensing operation.  When the sense amplifier is in pre-charge mode,
bit lines BLT and BLC are charged to a logical "1" state.  Pre-charge
is controlled by an RSK signal set at logical "0".  When RSK comes
high and the sense amplifier is selected, i.e., SEL = "0", bit lines
BLC or BLT fall low.  For example, if signals SEL and RSK are low and
BLC begins to fall, T3 begins to conduct and node AC falls.  Note
that signal NRSK is the inverse of RSK. As the voltage on node AC
drops below supply voltage VDD by a threshold voltage Vt, transistor
T4 begins to conduct turning on transistor T5 and feedback device T2.
Transistor T2 discharges node AC and bit line BLC to ground
potential. Transistor T5 discharges gates of transistors T6 and T1,
clamping both T6 and T1 off.  As node AC falls to "0", node DB is
charged high, and the sensing operation is complete. Transistor T1
performs the function when bit line BLT falls. Transistor T2 is then
clamped off.

      Disclosed anonymously.