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Browse Prior Art Database

Off-Chip Driver With Reduced Delay Skew

IP.com Disclosure Number: IPCOM000103101D
Original Publication Date: 1990-Jun-01
Included in the Prior Art Database: 2005-Mar-17
Document File: 1 page(s) / 26K

Publishing Venue

IBM

Related People

Mikan Jr, DG: AUTHOR [+2]

Abstract

This off-chip driver was designed to reduce the delay skew in a specific logic path. This logic path previously used a driver with little skew and the skew of the entire path became significant as a result of the network termination. This driver was purposely designed with a built-in skew in such a manner as to allow the entire path skew to be reduced. This was accomplished by using a large time constant on the base node of the output transistors, effectively reducing fall time and increasing rise time. The skew for the path was reduced from 2.3 nS to .8 nS. (Image Omitted)

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 100% of the total text.

Off-Chip Driver With Reduced Delay Skew

      This off-chip driver was designed to reduce the delay skew in a
specific logic path.  This logic path previously used a driver with
little skew and the skew of the entire path became significant as a
result of the network termination. This driver was purposely designed
with a built-in skew in such a manner as to allow the entire path
skew to be reduced.  This was accomplished by using a large time
constant on the base node of the output transistors, effectively
reducing fall time and increasing rise time. The skew for the path
was reduced from 2.3 nS to .8 nS.

                            (Image Omitted)

      Disclosed anonymously.